Demand for high-performance input and output has been increased with the development of a sophisticated computer, and a high-speed input-output interface, such as PCI Express (hereinafter, may be referred to as “PCIe”), has been used instead of PCI (Peripheral Component Interconnect).
The PCI and the PCIe are standards for connecting a central processing unit (CPU) to an input-output device inside a computer. The PCI directly connects the CPU to the input-output device in the form of a bus structure. Unlike the PCI, the PCIe connects the CPU to the input-output device in the form of a star structure in which a PCIe switch is installed between the CPU and the input-output device. That is, the CPU is connected to the input-output device on a one-on-one basis, and, when the connection between the CPU and the input-output device is branched, it is branched via the PCIe switch.
Such a PCIe switch sets a virtual bus therein, and provides a logic image in which the CPU is connected to each input-output device by the virtual bus. Consequently, the CPU can treat the PCIe the same as the PCI without being aware of a difference in configuration.
In recent years, a multistage configuration in which one PCIe switch is connected to another PCIe switch is used as a technique to add an input-output device to be connected to a computer using the PCIe. That is, a plurality of PCIe switches are connected in a hierarchical structure by connecting one PCIe switch to under another PCIe switch, thereby the number of input-output devices connected to one CPU can be increased.
Patent document 1: Japanese Laid-open Patent Publication No. 2010-079816
However, there is a problem that when the plurality of PCIe switches are connected, a method for connection between the PCIe switches is limited. Incidentally, this problem is not confined to the PCIe switch, and the same holds true for other switches having the same function as the PCIe switch.
For example, even when the plurality of PCIe switches are connected in a multistage configuration, there is a limit to connect a CPU to input-output devices via the PCIe switches in a tree structure. Namely, it is not possible to permit a loop structure which arises when the plurality of PCIe switches are connected. Therefore, duplicate connection is disabled so as to avoid the loop structure. Furthermore, the PCIe switches are connected in the multistage configuration, so redundant paths are made in order to respond to a PCIe switch failure; however, disablement of the loop structure and the redundant paths are achieved together with the maintenance of the tree structure, and therefore the management of the PCIe switches becomes complex.